The way tech companies continue to deliver ever-faster and more capable computers is undergoing a profound change—at the atomic level.
Performance gains that were for decades accomplished mostly by shrinking the individual components on microchips—often described as Moore’s Law—are now increasingly the result of materials science, which is evolving faster than it has in decades. Santa Clara-based Applied Materials, founded in 1967, a year before Intel, is the biggest of the companies that are leading the way.
It’s a change born of necessity. Chip makers are bumping up against a hard limit on how tiny the elements on chips can become, as some of their features can now be measured at the scale of just a few atoms.
As a result, manipulating what materials are in these tiny machines, and how they’re connected to one another, has become a primary way that engineers can continue to make them faster and more capable.
Applied Materials and its rivals Lam Research, Tokyo Electron and KLA, are, to one degree or another, materials science firms. Materials science is an interdisciplinary field, as much structural engineering as chemical engineering, that’s all about coming up with new compounds, and new ways to use them.
Applied Materials also invents new manufacturing processes, and makes the equipment that can put those processes into effect inside the extraordinarily complicated and expensive factories for microchips known as fabs. As the features on microchips have shrunk, the tolerance for error has also shrunk, the number of steps required to make them has increased, and the cost of each generation of fab grows by a factor of ten. The price tag for building a new one is now in excess of $10 billion.
These are the same types of facilities that are set to receive massive incentives from the Chips Act, a new law designed to promote domestic manufacturing of semiconductors, as the U.S. races to lessen its dependence on overseas factories for critical supplies of microchips.
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Applied Materials and its competitors aren’t new to the decades-long quest to make microchips faster. But with the demise of Moore’s Law, their talents for determining which atoms go where inside of chips has become more important than ever.
To be clear, engineers are still shrinking the features on a chip—albeit at a much slower pace than has historically been the norm. That any semblance of Moore’s Law continues—there are still a few atoms left to shave off the size of features inside chips, after all—is due largely to the Dutch company ASML. The company makes the bus-size, 180-ton, ultra-complicated devices that manipulate extreme ultraviolet light in exotic, never-before-attempted ways.
The next step is where Applied Materials and its competitors come in: These companies work hand in glove with chip makers, and other providers like ASML, to make possible most of the other steps involved in making chips.
It’s a process of sculpting at the atomic level. Layer by layer, the world’s most advanced chips are built up through processes of addition—of layers that can be mere atoms thick—and also subtraction of compounds on the same nanoscopic scale, says Scotten Jones, a senior fellow at TechInsights, the primary consultancy used by the semiconductor manufacturing industry.
As we reach the limits of how small different features can be made on a two-dimensional silicon wafer, chip makers have turned to the third dimension, building chips upward. This means the processing elements of a chip can be closer to memory, power, and communications, making the chip faster and more capable even if its features stay the same size.
But making chips three-dimensional means more complexity in manufacturing them, says Subramanian Iyer, who spent more than 30 years at IBM working on the manufacturing of microchips, and is now a professor at the University of California, Los Angeles.
One way to describe that complexity is to talk about how many wiring layers there are in a chip. Each wiring layer is devoted to channels that funnel electrons between other parts of the chip, so they’re a proxy for how many layers a chip has overall.
“In the late 90s, a chip with 6 wiring layers was state-of-the-art,” says Dr. Iyer. “Now some of these chips are at 19 to 20 wiring layers.”
If microchips were buildings, it’s as if the modest bungalows of years past have become towering high-rises.
Generally speaking, the more three-dimensional microchips become, the more depositing materials onto them and etching away the bits you don’t want matters, says Jones. And that’s the part of chip manufacturing done by Applied Materials and its competitors.
To understand why this is true, it helps to know that lithography—the process of using light, shone through masks, to lay down the pattern of elements on a chip—is fundamentally a two-dimensional process. Companies that specialize in lithography, like ASML, can use all kinds of mind-bending tricks to get the light they use to make patterns on a silicon chip with details ever-closer to the size of a single atom.
But adding another layer to a chip, and another and another on top of that? That’s the expertise and equipment made by the materials science and materials engineering companies like Applied Materials. And the clever chemistry required to etch away the parts of a silicon wafer you don’t want, after exposure to light in the lithography process, is too.
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Take, for example, the world’s most advanced logic chips. These are the central processing units in a cutting-edge computer, whether it’s in your phone, a data center, or vehicle, and are functionally distinct from the chips responsible for memory or the tiny radios that enable wireless communications.
Such a logic chip can require in excess of 1,500 individual manufacturing steps, says Tristan Holtam, head of corporate strategy and development at Applied Materials.
All those steps are required because of how far these chips stretch into the third dimension, says Jones of TechInsights. Each layer can require multiple manufacturing steps—using light to burn a pattern onto a chip, depositing materials in atoms-thick layers, or selectively etching away materials that you don’t want, he adds.
For example, in one of the newest processes, chip makers are laying down additional layers of pure silicon, and silicon that includes other elements, such as germanium. All of the resulting atoms added atop a chip in this process must be arranged in a perfect crystalline lattice in order for the resulting “horizontal nanosheets,” which form parts of individual transistors, to work, says Jones. The parts that are silicon-germanium must be etched away without touching the pure silicon, despite the fact that the two substances are quite similar—a very challenging task that requires yet more materials science.
All of these steps must be carried out inside a completely airless chamber. Even the tiniest defects can mean the microchip that’s being manufactured won’t work.
Meanwhile, every other chip company of consequence—and all the names you regularly hear, including Intel, TSMC and Samsung—can’t make their chips without the hardware and expertise of Applied Materials and a handful of other companies that focus on materials science.
With chip makers clamoring for even more innovations, Applied Materials is building a new, $4 billion R&D facility next door to its existing one in Silicon Valley. Inside, its customers will be able to try out new ways to make chips, in the same place Applied Materials is developing its latest cutting-edge methods.
Such a facility is necessary, says Holtam of Applied Materials, because continuing to push the boundaries of what can be done with silicon-based microchips means navigating what has become, in microchip manufacturing, a world of “mind-boggling complexity.”